Q1
0x20110000

beq $t0, $zero, exit
000100| 01000| 00000| 0000000000000010
opcode   RS(t0)   $zero    Immediate

addi, $s1, $1, 1
001000| 10001| 10001| 000...0001
opcode    $s1      $s1      Imme

0x08100050

For jump/ I format:
We remove the last 2 bits for jump because all instructions ends with 00
For only J format:
and we remove 4 bits in front as well

Q2
We switch the two input ports for the REGDST
That means the value for the read register is always going into the write register

a) add
right execution -> add $s1 , $zero, $s1
As long as the first and last is the same
Wrong -> add $s1 , $zero, $s2
because we are writing s2 into s2

b) LW
wrong -> lq $t0, 0($zero)
the immediate goes into the write instead of the address
right -> lw $t0, 0(0x4000)
because the immediate first 4 bits is the same as the address of t0

c) same
beq does not need to write

Q3

i) 0x8df80000: lw $24, 0($15)

ii) 0x1023000C: beq $1, $3, 12

iii) 0x0285c822: sub $25, $20, $5



lw no branching



Q4

b) LW instruction
400 (Instr meme) + 200(reg)  + 120 (ALU) + 350 (Data mem) + 30 (memtoreg mux) + 200 (write reg)
ALU is use to add the result

c) BEQ
200(Reg) + 400 (Instr) + 120 (ALU) + 30 (alu MUX)

Not using regdst
Use alu to minus
We don't know if WR will be $1 or $3